STM32MP257FAI3

STM32MP257FAI3 is a MPU with dual Arm Cortex-A35 at 1.5GHz, Cortex-M33 at 400MHz, 3xEthernet (2+1 switch), 3xFD-CAN, LVDS/DSI, H.264, 3D GPU, AI/NN, Secure Boot, Cryptography, DRAM enc/dec, PKA. The Cortex®‑A35 processor uses a highly efficient 8-stage in-order pipeline that has been extensively optimized to provide full Armv8-A features while maximizing area and power efficiency. STM32MP25xC/F devices also embed a Cortex®-M33 32bit RISC core (400MHz frequency) features FPU single precision which supports Arm® single-precision data-processing instructions, and data types. The Cortex®-M33 supports a full set of DSP instructions, TrustZone®, and a MPU which enhances application security. The STM32MP25xC/F devices also embed a Cortex®-M0+ 32bit RISC core operating at up to 200MHz frequency (16MHz when running from backup regulator). This processor is located in SmartRun domain, and used to ensure -low-power peripheral activity when all other processors and domains are stopped.

• Secure boot, cryptography hardware, 1.5GHz CPU1, 900MHz GPU, dual core Cortex-A35 FPU Neon TrustZone
• CPU cache:2x (32+32)Kbyte (L1 data+instruction), 512Kbyte (L2 unified) Cortex-A35 FPU Neon TrustZone
• Performance/frequency: 900MHz, up to 150Mtriangle/s or 900Mpixel/s (GPU), 900MHz, 1.35 TOPS (NPU)
• Embed a 3D graphic processing unit (VeriSilicon®, OpenGL ES 3.1, Vulkan 1.3, OpenCL 3.0, OpenVX 1.3)
• Graphic processing unit provide neural processor unit (VeriSilicon®, TensorFlowLite, ONNX, Linux NN)
• MCU: Cortex-M33 FPU TrustZone, 16Kbyte (data, instruction cache), 128Kbyte (only for Cortex-A35) ROM
• SDRAM (DDR3L, DDR4, LPDDR4), embedded SRAM (808Kbytes), video (decoder, encoder, video RAM)
• Timers: advanced, general purpose, basic, low power, SysTick, CNT, RTC, watchdog
• Communication peripherals: SPI, I2C, I3C, USART, UART, LPUART, SAI, PCIE, USB, SPDIFRX, FDCAN
• Junction temperature range from -40 to 125°C and 436 balls TFBGA (18x18, pitch 0.8mm) package