MT28FW02GBBA1LPC-0AAT

MT28FW02GBBA1LPC-0AAT is a parallel NOR flash automotive memory. The device is an asynchronous, uniform block, parallel NOR Flash memory device. The main memory array is divided into uniform blocks that can be erased independently so that valid data can be preserved while old data is purged. PROGRAM and ERASE commands are written to the command interface of the memory. The device supports asynchronous random read and page read from all blocks of the array. It also features an internal program buffer that improves throughput by programming 512 words via one command sequence. A 512-word extended memory block overlaps addresses with array block 0. Users can program this additional space and then protect it to permanently secure the contents. The device also features different levels of hardware and software protection to secure blocks from unwanted modification.

• Single-level cell (SLC) process technology
• Supply voltage: VCC = 2.7–3.6V (program, erase, read), VCCQ = 1.65 - VCC (I/O buffers)
• Word program: 25µs per word (TYP)
• Block erase (128KB): 0.2s (TYP)
• Unlock bypass, block erase, die erase, and write to buffer capability
• CYCLIC REDUNDANCY CHECK (CRC) operation to verify a program pattern
• VPP/WP# protection– protects first or last block regardless of block protection settings
• JESD47-compliant, 100,000 (minimum) ERASE cycles per block, data retention: 20 years (TYP)
• 2Gb density, x16 configuration
• 64-ball LBGA package, -40°C to +105°C operating temperature range (grade 2 AEC-Q100)