74HC4514PW,118

74HC4514PW,118 is a 4-to-16 line decoder/demultiplexer having four binary weighted address inputs (A0 to A3), with latches, a latch enable input (LE), an enable input (active-low E) and 16 outputs (Q0 to Q15). When LE is HIGH, the selected output is determined by the data on An. When LE goes LOW, the last data present at An are stored in the latches and the outputs remain stable. When active-low E is LOW, the selected output, determined by the contents of the latch, is HIGH. At active-low E HIGH, all outputs are LOW. The enable input E does not affect the state of the latch. When the device is used as a demultiplexer, active-low E is the data input and A0 to A3 are the address inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. It is used in applications such as digital multiplexing, address decoding, hexadecimal/BCD decoding.

• Wide supply voltage range from 2.0V to 6.0V
• CMOS low power dissipation, high noise immunity
• CMOS input level, 16-line demultiplexing capability
• Decodes 4 binary-coded inputs into 16 mutually-exclusive outputs
• Latch-up performance exceeds 100mA per JESD 78 Class II Level B
• Complies with JEDEC standards JESD8C (2.7V to 3.6V), JESD7A (2V to 6V)
• ESD protection: HBM JESD22-A114F exceeds 2000V, MM JESD22-A115-A exceeds 200V
• Input leakage current is ±0.1μA maximum at (VI = VCC or GND; VCC = 6V, +25°C)
• Supply current is 8μA maximum at (VI = VCC or GND; IO = 0A; VCC = 6V, +25°C)
• Operating temperature range from -40°C to +125°C, TSSOP24 package

注意事項

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