CD74HCT367E

The CD74HCT367E is a silicon gate CMOS 3-state Buffer has high drive current outputs which enable high speed operation even when driving large bus capacitances. The general purpose high-speed non-inverting and inverting buffer circuit possesses the low power dissipation of CMOS circuitry, yet has speeds comparable to low power Schottky TTL circuits. The circuit is capable of driving up to 15 low power Schottky inputs. The CD74HCT367 is non-inverting buffer. This device has two output enables, one enable (OE1) controls 4 gates and the other (OE2) controls the remaining 2 gates. The HCT367 logic family is speed, function and pin compatible with the standard LS logic family.

• Buffered inputs
• High current bus driver outputs
• Two independent 3-state enable controls
• Balanced propagation delay and transition times
• Significant power reduction compared to LSTTL logic ICs
• Direct LSTTL input logic compatibility, VIL = 0.8V Maximum, VIH = 2V minimum
• CMOS input compatibility, Il ≤1µA at VOL, VOH
• Typical propagation delay tPLH, tPHL = 8ns at VCC =5V, CL = 15pF, TA = 25°C
• Standard outputs - 10 LSTTL loads
• Bus driver outputs - 15 LSTTL loads
• Green product and no Sb/Br