74AVC2T45DC,125

74AVC2T45DC,125 is a dual-bit, dual-supply transceiver that enables bidirectional level translation. It features two data input-output ports (nA and nB), a direction control input (DIR) and dual-supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8V and 3.6V making the device suitable for translating between any of the low voltage nodes (0.8V, 1.2V, 1.5V, 1.8V, 2.5V and 3.3V). Pins nA and DIR are referenced to VCC(A) and pins nB are referenced to VCC(B). A HIGH on DIR allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In Suspend mode when either VCC(A) or VCC(B) are at GND level, both A and B are in the high-impedance OFF-state.

• High noise immunity, complies with JEDEC standards
• ESD protection, suspend mode
• Latch-up performance exceeds 100mA per JESD 78 Class II
• Inputs accept voltages upto 3.6V, low noise overshoot and undershoot <lt/>10% of VCC
• IOFF circuitry provides partial power-down mode operation
• Input leakage current is ±0.025μA typ at (DIR input; VI= 0V or 3.6V;VCC(A) = VCC(B) = 0.8V to 3.6V)
• Input capacitance is 1pF typ at (DIR input; VI= 0V or 3.3V;VCC(A) = VCC(B) = 3.3V)
• Operating temperature range from -40°C to +125°C
• VSSOP8 package

注意事項

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