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| 数量 | 価格(税込み) |
|---|---|
| 1+ | ¥169.83 (¥186.813) |
| 10+ | ¥122.15 (¥134.365) |
| 50+ | ¥110.37 (¥121.407) |
| 100+ | ¥97.43 (¥107.173) |
| 250+ | ¥97.42 (¥107.162) |
| 500+ | ¥97.41 (¥107.151) |
| 1000+ | ¥97.4 (¥107.14) |
| 2500+ | ¥97.39 (¥107.129) |
製品概要
The PCA9617ATPZ is a CMOS level translating Fm+ I²C-bus Repeater provides level shifting between low voltage (0.8 to 5.5V) and higher voltage (2.2 to 5.5V) fast-mode plus (Fm+) I²C-bus or SMBus applications. While retaining all the operating modes and features of the I²C-bus system during the level shifts, it also permits extension of the I²C-bus by providing bidirectional buffering for both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 540pF at 1MHz or up to 4000pF at lower speeds. Using the PCA9617A enables the system designer to isolate two halves of a bus for both voltage and capacitance. The SDA and SCL pins are overvoltage tolerant and are high-impedance when the PCA9617A is unpowered. The 2.2 to 5.5V bus port B drivers have the static level offset, while the adjustable voltage bus port A drivers eliminate the static offset voltage. This results in a low on the port B translating into a nearly 0V low on the port A.
- Voltage level translation
- Footprint and functional replacement for PCA9517A at fast-mode speeds
- Active high repeater enable input referenced to VCC(B)
- Open-drain input/outputs
- Latching free operation
- Supports arbitration and clock stretching across the repeater
- Powered-OFF high-impedance I²C-bus pins
- Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100mA
注意事項
Market demand for this product has caused an extension in leadtimes. Delivery dates may fluctuate. Product exempt from discounts.
技術仕様
2入力
-
HWSON
2.2V
-40°C
レベル 変換器
-
0
-
8ピン
HWSON
5.5V
85°C
-
0
技術文書 (1)
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最後に重要な製造工程が行われた国生産国:Thailand
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製品コンプライアンス証明書