74HC138D,653

74HC138D,653 is a inverting 3-to-8 line decoder/demultiplexer. This decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs active low (Y0 to Y7). The device features three enable inputs (active low (E1, E2) and E3). Every output will be HIGH unless active low E1 and active low E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four '138 ICs and one inverter. The '138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

• Wide supply voltage range from 2 to 6V
• CMOS low power dissipation and high noise immunity
• Demultiplexing capability
• Multiple input enable for easy expansion
• Complies with JEDEC standard
• Ideal for memory chip select decoding
• Active LOW mutually exclusive outputs
• Features ESD protection
• 16 pin SO package
• Temperature range from -40°C to +125°C