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| 数量 | 価格(税込み) |
|---|---|
| 1+ | ¥789.23 (¥868.153) |
| 10+ | ¥552.93 (¥608.223) |
| 25+ | ¥536.13 (¥589.743) |
| 50+ | ¥519.33 (¥571.263) |
| 100+ | ¥502.52 (¥552.772) |
| 250+ | ¥477.32 (¥525.052) |
| 500+ | ¥461.57 (¥507.727) |
| 1000+ | ¥450.54 (¥495.594) |
製品概要
The TPIC6259N is a 8-bit addressable latch controls open-drain DMOS transistor outputs and is designed for general-purpose storage applications in digital systems. Specific uses include working registers, serial-holding registers and decoders or demultiplexers. This is a multi-functional device capable of storing single-line data in eight addressable latches with 3-to-8 decoding or demultiplexing mode active-low DMOS outputs. Four distinct modes of operation are selectable by controlling the clear (CLR\) and enable (G\) inputs as enumerated in the function table. In the addressable-latch mode, data at the data-in (D) terminal is written into the addressed latch. The addressed DMOS transistor output inverts the data input with all unaddressed DMOS-transistor outputs remaining in their previous states. In the memory mode, all DMOS-transistor outputs remain in their previous states and are unaffected by the data or address inputs.
- Eight power DMOS transistor outputs of 250mA continuous current
- Output clamp voltage at 45V
- Four distinct function modes
- Low power consumption
- 75mJ Avalanche energy
- 1.5A Pulsed current per output
技術仕様
-
規格
250mA
DIP
4.5V
8bit
-
125°C
-
0
アドレサブル
625ns
DIP
20ピン
5.5V
TPIC
-40°C
-
0
技術文書 (1)
TPIC6259N の代替製品
1 見つかった製品
法律および環境情報
最後に重要な製造工程が行われた国生産国:Malaysia
最後に重要な製造工程が行われた国
RoHS
RoHS
製品コンプライアンス証明書