NEXPERIA 74HCT109D,653

74HCT109D,653 is a dual positive edge triggered J active-low K flip-flop featuring individual J and K inputs, clock (CP) inputs, set and reset inputs and complementary Q and active-low Q outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. The J and active-low K inputs control the state changes of the flip-flops as described in the mode select function table. The J and active-low K inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. The J active-low K design allows operation as a D-type flip-flop by connecting the J and active-low K inputs together. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.