NEXPERIA 74HC670D,652

The 74HC670D is a 4 x 4 high-speed Si-gate CMOS Register File pin compatible with low power Schottky TTL (LSTTL). It is a 16-bit 3-state register file organized as 4 words of 4 bits each. Separated read and write address inputs (RA, RB and WA, WB) and enable inputs (RE\ and WE\) are available, permitting simultaneous writing into one word location and reading from another location. The 4-bit word to be stored is presented to four data inputs (D0 to D3). The WA and WB inputs determine the location of the stored word. When the WE\ input is low, the data is entered into the addressed location. The addressed location remains transparent to the data while the WE\ input is low. Data supplied at the inputs will be read out in true form from the 3-state outputs (Q0 to Q3). Dn and Wn inputs are inhibited when WE\ is high. Direct acquisition of data stored in any of the four registers is made possible by individual read address inputs.