74HC165D,653

74HC165D,653 is a 8bit parallel in/serial out shift register. The device features a serial data input (DS), eight parallel data inputs (D0 to D7) and two complementary serial outputs (Q7 and (active low)Q7). When the parallel load input (active low)(PL) is LOW the data from D0 to D7 is loaded into the shift register asynchronously. When (active low) PL is HIGH data enters the register serially at DS. When the clock enable input (CE) is LOW data is shifted on the LOW-to-HIGH transitions of the CP input. A HIGH on (active low) CE will disable the CP input. Inputs are overvoltage tolerant to 15 V. This enables the device to be used in HIGH-to-LOW level shifting applications.

• Supply voltage range from 2V to 6V
• CMOS low power dissipation
• High noise immunity
• Synchronous serial input
• Asynchronous 8bit parallel load
• CMOS input level and complies with JEDEC standards
• ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000V
• Latch-up performance exceeds 100mA per JESD 78 Class II Level B
• 16 pin SO package
• Temperature range from -40°C to +125°C