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TEXAS INSTRUMENTS SN74LVC125ADR

Buffer / Line Driver, 74LVC125, 1.65 V to 3.6 V, SOIC-14

TEXAS INSTRUMENTS SN74LVC125ADR

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Manufacturer Part No:
SN74LVC125ADR
Order Code:
3119581
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ECAD / MCAD
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Product Overview

The SN74LVC125ADR is a Quadruple Bus Buffer Gate, designed for 1.65 to 3.6V VCC operation. The SN74LVC125ADR device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor, the minimum value of the resistor is determined by the current-sinking capability of the driver. Inputs can be driven from either 3.3 or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3/5V system environment. ESD protection exceeds JESD 22, 2000V human-body model, 200V machine model and 1000V charged-device model.
  • 3-state Outputs
  • Separate OE for all 4 buffers
  • Inputs accept voltages to 5.5V
  • Maximum TPD of 4.8ns at 3.3V
  • 0.8V at VCC = 3.3V, TA = 25°C Typical VOLP (output ground bounce)
  • 2V at VCC = 3.3V, TA = 25°C Typical VOHV (output VOH undershoot)
  • Latch-up performance exceeds 250mA per JESD 17
  • Green product and no Sb/Br

Applications

Communications & Networking, Wireless, Imaging, Video & Vision, Microwave, Power Management, Signal Processing

Warnings

Device has limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

Product Information

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:
Buffer, Non Inverting

:
74LVC125

:
SOIC

:
SOIC

:
1.65V

:
3.6V

:
74LVC

:
74125

:
-40°C

:
125°C

:
-

:
-

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Technical Documents (1)

Packaging type Cut Tape

Available for back order

More stock available to supplier lead times which is approximately 10/27/25

Due to market conditions delivery times are for general guidance only and may be subject to change at short notice

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¥36.06 ( ¥39.67  Inc. JCT)

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